The present invention relates to a PIN diode used in RF and microwave applications, and a method for making the PIN diode. Specifically, a PIN diode is disclosed having an increased intrinsic region volume for enhancing high frequency operation.
In the field of radio frequency communications, PIN diodes are used in many applications for switching radio frequency signals. For instance, in the cellular telephone art, transmit receive switches may be implemented using PIN diodes which alternately connect an antenna to either a transmitter or receiver section of a radio telephone. The PIN diodes operate in either an on, conducting condition, wherein there is a radio frequency path through the device, or an off non-conducting condition which effectively blocks any radio frequency signal transmission. Additionally, these devices can be used to switch between frequency sources in a cellular telephone application wherein multiple bands of frequency operation are provided. During the on conducting state of the PIN diode, the diode must remain in a stable conduction condition. The peak radio frequency voltage swings across the diode due to the RF signal should not affect the conduction of the device when either the on or off mode is selected.
The performance of the PIN diode is improved when the volume of the intrinsic region of the diode is increased. Increasing the volume, increases the charge storage capability for the PIN diode, rendering it slower to turn on and off, thereby making the device more stable and less susceptible to inadvertent switching due to high amplitude RF voltage swings.
An additional requirement for the design of the PIN diode is that it be compatible with the manufacturing processes used to implement other devices, such as bipolar transistors and FET devices, so that a variety of these devices may be manufactured using the same silicon manufacturing process.
A PIN diode, and a manufacturing process for implementing the diode, are provided having an increased intrinsic region volume. In accordance with one aspect of the invention, the intrinsic region volume is increased by creating a lateral PIN diode having an N+ subcollector region forming a cathode on a substrate. A silicon epi intrinsic layer is formed over the subcollector, and N+ implants are formed as connections to and extensions of the subcollector/cathode. A dielectric insulation region is deposited on the surface of the silicon epi layer adjacent to each of the implants. A P+ doped anode is grown over the dielectric insulation which maintains the anode out of contact with the implants, and provides a larger intrinsic region having an increased charge retention capability.
In accordance with another aspect of the invention, a subcollector-cathode region may have an opening under the anode portion connected by an N-skin. The N-skin increases the distance from the anode to the subcollector/cathode, so that a larger volume of charge may be accumulated in the intrinsic region.
In yet another aspect of the invention, the anode may be separated from the cathode implants by a shallow trench isolation (STI) structure located adjacent the N+ implants to provide a vertical PIN diode. The STI structure limits hole and electron conduction between the anode and implants N+, so that current conduction is essentially vertical.